Hardware Acceleration and Coprocessing
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چکیده
CRC is significantly more efficient in hardware than software; consequently, you can improve the throughput of your system by implementing a hardware accelerator for CRC. In addition, by eliminating CRC from the tasks that the processor must run, the processor has more bandwidth to accomplish other tasks. Figure 8–1 illustrates a system in which a Nios® II processor offloads CRC processing to a hardware accelerator. In this system, the Nios II processor reads and writes registers to control the CRC using its Avalon® Memory-Mapped (Avalon-MM) slave port. The CRC component’s Avalon-MM master port reads data for the CRC check from memory.
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